The SiI9226 Mobile HD Link Transmitter facilitates the design of low pin count, low-power mobile HDMI-interoperable applications.
It implements the Mobile HD Link (MHL) standard to carry formatted video and audio to Mobile HD Link-capable receivers, using five pins on a mobile connector. Mobile HD Link
signalling is readily converted to a standard HDMI compliant signal when needed.
Silicon Image MHL products use the latest generation of TMDS core technology. With this ultra low-power solution, HD camcorders, digital still cameras, and personal mobile devices can connect to a large installed base of HDMI TVs.
The SiI9226 transmitter combined with an MHL capable receiver such as SiI9290 meets the HDMI 1.3 compliance test specification.
- The transmitter sends all data over a single differential pair instead of three pairs, with the clocking signal superimposed over the data signal as a common mode signal
- A single wire control bus supports all sideband signalling for DDC, CEC, HPD, and Receiver sense
- The receiver converts received data to standard HDMI.
The transmitter supports 640 x 480, 480/576i, 480/576p, 720p/1080i, and all CEA resolutions in between (75MHz input, 225MHz at the link).
- The RGB parallel interface supports HD MPEG decoders in DSCs and DVCs
- 8/10/12-bit or 16/20/24-bit YCbCr 4:2:2
- ITU-R BT.601/656, BTA-T1004 video input formats
- 24-bit RGB/YCbCr 4:4:4
- Colour space conversions between YCbCr and RGB
- Input clock divider (0.5x, 2x, 4x)
- Programmable DE generation and sync extraction
The SiI9226 Mobile HD Link Transmitter offers these additional features:
- High-end digital audio interface
- Two I2S (IEC60958 and IEC61937 compliant) input lanes supporting four audio channels
- S/PDIF input supporting multi-channel (5.1) Dolby Digital, DTS, MPEG2 Audio, two channel PCM (32-192 kHz Fs sample rate)
- MCLK generator for S/PDIF operation without external clock PLL; external MCLK optional
- 2:1 and 4:1 down-sampling to handle 96 kHz and 192 kHz audio streams.
- Consumer Electronics Control (CEC) hardware protocol and arbitration logic, software-compatible
with other Silicon Image CEC products
- Single slave I2C from host, for internal register access as well as remote DDC access MHL CTRL pin, simplifies board layout and lowers cost
- Implements an advanced programming interface to eliminate over 90% of host processor firmware
- Fully automatic calculation of S/PDIF audio CTS/N values
- 1.2 V core consumes minimal power in both active and standby modes
- 64-ball VFBGA package, 0.5 mm pitch, 5x5 mm footprint
- Standard part covers extended (-20 to +85°C) temperature range.